1. Field of the Invention
This invention relates to a circuit board, a semiconductor device, and a manufacturing method of the circuit board.
2. Description of the Related Art
A chip scale package (CSP) has been known as a mounting structure of an electronic equipment suitable for the size reduction of the electronic equipment. The CSP has a structure in which a semiconductor chip is bonded face down to a substrate having substantially the same area as the semiconductor chip, generally a relay substrate called an interposer and in which the semiconductor chip is connected to a printed wiring board via wiring lines and via holes provided in the interposer. Jpn. Pat. Appln. KOKAI Publication No. 2001-326305 discloses a representative CSP. In this prior art document, the substrate of the interposer is made of silicon. Since the silicon substrate is used, both surfaces of the substrate can be smoothed by polishing the substrate, and micropatterns can be easily formed, and moreover, flexure and bending can be held down even if the thickness of the substrate is reduced. An upper wiring line and a lower wiring line are respectively provided on the upper surface and lower surface of the silicon substrate. The upper wiring line is connected to the corresponding lower wiring line via a cylindrical vertical conductor provided in the inner wall surface of a through hole formed in the silicon substrate. Solder balls are provided under connection pad portions of the lower wiring line.
In the conventional semiconductor device, pads provided on the lower surface of the semiconductor chip are bonded to the connection pad portions of the lower wiring line of the interposer such that the semiconductor chip is installed on the interposer, and the solder balls of the interposer are bonded to connection terminals on the printed wiring board such that the semiconductor chip is mounted on the printed wiring board via the interposer.
In the conventional semiconductor device, since the vertical conductor of the interposer is cylindrical, a solder ball can not be provided in the lower part of this cylindrical vertical conductor. Thus, the solder balls are provided under the connection pad portions of the lower wiring line connected to the vertical conductor, and because a region is required to dispose the lower wiring line, there is a problem that the area of the interposer is increased and the whole semiconductor device is thus increased in size.